Fix various interpreter issues, add extensive port transition tests
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7 changed files with 1111 additions and 225 deletions
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/**
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* Copyright (C) 2015 Typesafe Inc. <http://www.typesafe.com>
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*/
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package akka.stream.impl.fusing
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import akka.stream.{ NoMaterializer, Outlet, Inlet, Shape }
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import akka.stream.impl.fusing.GraphInterpreter.{ GraphAssembly, DownstreamBoundaryStageLogic, UpstreamBoundaryStageLogic }
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import akka.stream.stage.{ InHandler, OutHandler, GraphStage, GraphStageLogic }
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trait GraphInterpreterSpecKit {
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sealed trait TestEvent {
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def source: GraphStageLogic
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}
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case class OnComplete(source: GraphStageLogic) extends TestEvent
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case class Cancel(source: GraphStageLogic) extends TestEvent
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case class OnError(source: GraphStageLogic, cause: Throwable) extends TestEvent
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case class OnNext(source: GraphStageLogic, elem: Any) extends TestEvent
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case class RequestOne(source: GraphStageLogic) extends TestEvent
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case class RequestAnother(source: GraphStageLogic) extends TestEvent
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abstract class TestSetup {
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protected var lastEvent: Set[TestEvent] = Set.empty
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private var _interpreter: GraphInterpreter = _
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protected def interpreter: GraphInterpreter = _interpreter
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class AssemblyBuilder(stages: Seq[GraphStage[_ <: Shape]]) {
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var upstreams = Vector.empty[(UpstreamBoundaryStageLogic[_], Inlet[_])]
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var downstreams = Vector.empty[(Outlet[_], DownstreamBoundaryStageLogic[_])]
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var connections = Vector.empty[(Outlet[_], Inlet[_])]
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def connect[T](upstream: UpstreamBoundaryStageLogic[T], in: Inlet[T]): AssemblyBuilder = {
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upstreams :+= upstream -> in
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this
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}
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def connect[T](out: Outlet[T], downstream: DownstreamBoundaryStageLogic[T]): AssemblyBuilder = {
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downstreams :+= out -> downstream
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this
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}
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def connect[T](out: Outlet[T], in: Inlet[T]): AssemblyBuilder = {
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connections :+= out -> in
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this
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}
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def init(): Unit = {
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val ins = upstreams.map(_._2) ++ connections.map(_._2)
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val outs = connections.map(_._1) ++ downstreams.map(_._1)
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val inOwners = ins.map { in ⇒ stages.indexWhere(_.shape.inlets.contains(in)) }
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val outOwners = outs.map { out ⇒ stages.indexWhere(_.shape.outlets.contains(out)) }
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val assembly = GraphAssembly(
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stages.toArray,
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(ins ++ Vector.fill(downstreams.size)(null)).toArray,
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(inOwners ++ Vector.fill(downstreams.size)(-1)).toArray,
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(Vector.fill(upstreams.size)(null) ++ outs).toArray,
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(Vector.fill(upstreams.size)(-1) ++ outOwners).toArray)
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val (inHandlers, outHandlers, logics, _) = assembly.materialize()
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_interpreter = new GraphInterpreter(assembly, NoMaterializer, inHandlers, outHandlers, logics, (_, _, _) ⇒ ())
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for ((upstream, i) ← upstreams.zipWithIndex) {
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_interpreter.attachUpstreamBoundary(i, upstream._1)
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}
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for ((downstream, i) ← downstreams.zipWithIndex) {
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_interpreter.attachDownstreamBoundary(i + upstreams.size + connections.size, downstream._2)
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}
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_interpreter.init()
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}
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}
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def manualInit(assembly: GraphAssembly): Unit = {
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val (inHandlers, outHandlers, logics, _) = assembly.materialize()
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_interpreter = new GraphInterpreter(assembly, NoMaterializer, inHandlers, outHandlers, logics, (_, _, _) ⇒ ())
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}
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def builder(stages: GraphStage[_ <: Shape]*): AssemblyBuilder = new AssemblyBuilder(stages.toSeq)
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def lastEvents(): Set[TestEvent] = {
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val result = lastEvent
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clearEvents()
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result
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}
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def clearEvents(): Unit = lastEvent = Set.empty
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class UpstreamProbe[T](override val toString: String) extends UpstreamBoundaryStageLogic[T] {
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val out = Outlet[T]("out")
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setHandler(out, new OutHandler {
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override def onPull(): Unit = lastEvent += RequestOne(UpstreamProbe.this)
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override def onDownstreamFinish() = lastEvent += Cancel(UpstreamProbe.this)
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})
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def onNext(elem: T, eventLimit: Int = Int.MaxValue): Unit = {
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if (GraphInterpreter.Debug) println(s"----- NEXT: $this $elem")
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push(out, elem)
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interpreter.execute(eventLimit)
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}
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}
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class DownstreamProbe[T](override val toString: String) extends DownstreamBoundaryStageLogic[T] {
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val in = Inlet[T]("in")
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setHandler(in, new InHandler {
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override def onPush(): Unit = lastEvent += OnNext(DownstreamProbe.this, grab(in))
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override def onUpstreamFinish() = lastEvent += OnComplete(DownstreamProbe.this)
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override def onUpstreamFailure(ex: Throwable) = OnError(DownstreamProbe.this, ex)
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})
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def requestOne(eventLimit: Int = Int.MaxValue): Unit = {
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if (GraphInterpreter.Debug) println(s"----- REQ $this")
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pull(in)
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interpreter.execute(eventLimit)
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}
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}
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}
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abstract class PortTestSetup extends TestSetup {
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val out = new UpstreamPortProbe[Int]
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val in = new DownstreamPortProbe[Int]
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class UpstreamPortProbe[T] extends UpstreamProbe[T]("upstreamPort") {
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def isAvailable: Boolean = isAvailable(out)
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def isClosed: Boolean = isClosed(out)
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def push(elem: T): Unit = push(out, elem)
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def complete(): Unit = complete(out)
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def fail(ex: Throwable): Unit = fail(out, ex)
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}
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class DownstreamPortProbe[T] extends DownstreamProbe[T]("upstreamPort") {
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def isAvailable: Boolean = isAvailable(in)
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def hasBeenPulled: Boolean = hasBeenPulled(in)
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def isClosed: Boolean = isClosed(in)
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def pull(): Unit = pull(in)
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def cancel(): Unit = cancel(in)
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def grab(): T = grab(in)
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setHandler(in, new InHandler {
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// Modified onPush that does not grab() automatically the element. This accesses some internals.
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override def onPush(): Unit =
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lastEvent +=
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OnNext(
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DownstreamPortProbe.this,
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interpreter.connectionStates(inToConn(in)))
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override def onUpstreamFinish() = lastEvent += OnComplete(DownstreamPortProbe.this)
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override def onUpstreamFailure(ex: Throwable) = OnError(DownstreamPortProbe.this, ex)
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})
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}
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def stepAll(): Unit = interpreter.execute(eventLimit = Int.MaxValue)
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def step(): Unit = interpreter.execute(eventLimit = 1)
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private val assembly = GraphAssembly(
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stages = Array.empty,
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ins = Array(null),
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inOwners = Array(-1),
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outs = Array(null),
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outOwners = Array(-1))
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manualInit(assembly)
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interpreter.attachDownstreamBoundary(0, in)
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interpreter.attachUpstreamBoundary(0, out)
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interpreter.init()
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}
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}
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