Low level interpreter tests working without GraphAssembly #22423
This commit is contained in:
Johan Andrén
GitHub
parent
44260fe5d3
commit
c028b550f2
26 changed files with 354 additions and 575 deletions
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@ -1,103 +1,268 @@
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/**
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* Copyright (C) 2015-2017 Lightbend Inc. <http://www.lightbend.com>
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*/
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/* FIXME enable again
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package akka.stream.impl.fusing
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import akka.event.Logging
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import akka.stream.ActorAttributes.SupervisionStrategy
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import akka.stream.Supervision.Decider
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import akka.stream._
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import akka.stream.impl.fusing.GraphInterpreter.{ DownstreamBoundaryStageLogic, Failed, GraphAssembly, UpstreamBoundaryStageLogic }
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import akka.stream.impl.fusing.GraphInterpreter.{ Connection, DownstreamBoundaryStageLogic, Failed, UpstreamBoundaryStageLogic }
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import akka.stream.stage.{ GraphStage, GraphStageLogic, InHandler, OutHandler, _ }
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import akka.stream.testkit.StreamSpec
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import akka.stream.testkit.Utils.TE
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import akka.stream.impl.fusing.GraphInterpreter.GraphAssembly
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import scala.collection.{ Map ⇒ SMap }
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import scala.language.existentials
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object GraphInterpreterSpecKit {
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/**
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* Create logics and enumerate stages and ports
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*
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* @param stages Stages to "materialize" into graph stage logic instances
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* @param upstreams Upstream boundary logics that are already instances of graph stage logic and should be
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* part of the graph, is placed before the rest of the stages
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* @param downstreams Downstream boundary logics, is placed after the other stages
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* @param attributes Optional set of attributes to pass to the stages when creating the logics
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* @return Created logics and the maps of all inlets respective outlets to those logics
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*/
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private[stream] def createLogics(
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stages: Array[GraphStageWithMaterializedValue[_ <: Shape, _]],
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upstreams: Array[UpstreamBoundaryStageLogic[_]],
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downstreams: Array[DownstreamBoundaryStageLogic[_]],
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attributes: Array[Attributes] = Array.empty): (Array[GraphStageLogic], SMap[Inlet[_], GraphStageLogic], SMap[Outlet[_], GraphStageLogic]) = {
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if (attributes.nonEmpty && attributes.length != stages.length)
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throw new IllegalArgumentException("Attributes must be either empty or one per stage")
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var inOwners = SMap.empty[Inlet[_], GraphStageLogic]
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var outOwners = SMap.empty[Outlet[_], GraphStageLogic]
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val logics = Array.ofDim[GraphStageLogic](upstreams.length + stages.length + downstreams.length)
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var idx = 0
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while (idx < upstreams.length) {
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val upstream = upstreams(idx)
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upstream.stageId = idx
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logics(idx) = upstream
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upstream.out.id = 0
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outOwners = outOwners + (upstream.out → upstream)
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idx += 1
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}
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var stageIdx = 0
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while (stageIdx < stages.length) {
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val stage = stages(stageIdx)
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setPortIds(stage.shape)
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val stageAttributes =
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if (attributes.nonEmpty) stage.traversalBuilder.attributes and attributes(stageIdx)
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else stage.traversalBuilder.attributes
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val logic = stage.createLogicAndMaterializedValue(stageAttributes)._1
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logic.stageId = idx
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var inletIdx = 0
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while (inletIdx < stage.shape.inlets.length) {
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val inlet = stage.shape.inlets(inletIdx)
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inlet.id = inletIdx
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inOwners = inOwners + (inlet → logic)
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inletIdx += 1
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}
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var outletIdx = 0
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while (outletIdx < stage.shape.outlets.length) {
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val outlet = stage.shape.outlets(outletIdx)
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outlet.id = outletIdx
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outOwners = outOwners + (outlet → logic)
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outletIdx += 1
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}
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logics(idx) = logic
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idx += 1
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stageIdx += 1
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}
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var downstreamIdx = 0
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while (downstreamIdx < downstreams.length) {
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val downstream = downstreams(downstreamIdx)
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downstream.stageId = idx
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logics(idx) = downstream
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downstream.in.id = 0
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inOwners = inOwners + (downstream.in → downstream)
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idx += 1
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downstreamIdx += 1
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}
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(logics, inOwners, outOwners)
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}
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/**
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* Create connections given a list of flow logics where each one has one connection to the next one
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*/
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private[stream] def createLinearFlowConnections(logics: Seq[GraphStageLogic]): Array[Connection] = {
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require(logics.length >= 2, s"$logics is too short to create a linear flow")
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logics.sliding(2).zipWithIndex.map {
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case (window, idx) ⇒
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val outOwner = window(0)
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val inOwner = window(1)
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val connection = new Connection(
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id = idx,
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outOwnerId = outOwner.stageId,
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outOwner = outOwner,
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outHandler = outOwner.outHandler(0),
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inOwner = inOwner,
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inOwnerId = inOwner.stageId,
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inHandler = inOwner.inHandler(0)
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)
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outOwner.portToConn(outOwner.inCount) = connection
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inOwner.portToConn(0) = connection
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connection
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}.toArray
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}
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/**
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* Create interpreter connections for all the given `connectedPorts`.
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*/
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private[stream] def createConnections(
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logics: Seq[GraphStageLogic],
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connectedPorts: Seq[(Outlet[_], Inlet[_])],
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inOwners: SMap[Inlet[_], GraphStageLogic],
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outOwners: SMap[Outlet[_], GraphStageLogic]): Array[Connection] = {
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val connections = Array.ofDim[Connection](connectedPorts.size)
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connectedPorts.zipWithIndex.foreach {
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case ((outlet, inlet), idx) ⇒
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val outOwner = outOwners(outlet)
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val inOwner = inOwners(inlet)
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val connection = new Connection(
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id = idx,
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outOwnerId = outOwner.stageId,
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outOwner = outOwner,
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outHandler = outOwner.outHandler(outlet.id),
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inOwnerId = inOwner.stageId,
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inOwner = inOwner,
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inHandler = inOwner.inHandler(inlet.id)
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)
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connections(idx) = connection
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inOwner.portToConn(inlet.id) = connection
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outOwner.portToConn(outOwner.inCount + outlet.id) = connection
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}
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connections
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}
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private def setPortIds(shape: Shape): Unit = {
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shape.inlets.zipWithIndex.foreach {
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case (inlet, idx) ⇒ inlet.id = idx
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}
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shape.outlets.zipWithIndex.foreach {
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case (outlet, idx) ⇒ outlet.id = idx
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}
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}
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private def setPortIds(stage: GraphStageWithMaterializedValue[_ <: Shape, _]): Unit = {
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stage.shape.inlets.zipWithIndex.foreach { case (inlet, idx) ⇒ inlet.id = idx }
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stage.shape.outlets.zipWithIndex.foreach { case (inlet, idx) ⇒ inlet.id = idx }
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}
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private def setLogicIds(logics: Array[GraphStageLogic]): Unit = {
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logics.zipWithIndex.foreach { case (logic, idx) ⇒ logic.stageId = idx }
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}
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}
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trait GraphInterpreterSpecKit extends StreamSpec {
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import GraphInterpreterSpecKit._
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val logger = Logging(system, "InterpreterSpecKit")
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abstract class Builder {
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private var _interpreter: GraphInterpreter = _
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protected def interpreter: GraphInterpreter = _interpreter
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def stepAll(): Unit = interpreter.execute(eventLimit = Int.MaxValue)
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def step(): Unit = interpreter.execute(eventLimit = 1)
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object Upstream extends UpstreamBoundaryStageLogic[Int] {
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override val out = Outlet[Int]("up")
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out.id = 0
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override def toString = "Upstream"
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setHandler(out, new OutHandler {
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override def onPull() = {
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// TODO handler needed but should it do anything?
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}
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override def toString = "Upstream.OutHandler"
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})
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}
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object Downstream extends DownstreamBoundaryStageLogic[Int] {
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override val in = Inlet[Int]("down")
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in.id = 0
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setHandler(in, new InHandler {
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override def onPush() = {
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// TODO handler needed but should it do anything?
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}
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override def toString = "Downstream.InHandler"
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})
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override def toString = "Downstream"
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}
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class AssemblyBuilder(stages: Seq[GraphStageWithMaterializedValue[_ <: Shape, _]]) {
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var upstreams = Vector.empty[(UpstreamBoundaryStageLogic[_], Inlet[_])]
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var downstreams = Vector.empty[(Outlet[_], DownstreamBoundaryStageLogic[_])]
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var connections = Vector.empty[(Outlet[_], Inlet[_])]
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private var upstreams = Vector.empty[UpstreamBoundaryStageLogic[_]]
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private var downstreams = Vector.empty[DownstreamBoundaryStageLogic[_]]
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private var connectedPorts = Vector.empty[(Outlet[_], Inlet[_])]
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def connect[T](upstream: UpstreamBoundaryStageLogic[T], in: Inlet[T]): AssemblyBuilder = {
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upstreams :+= upstream → in
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upstreams :+= upstream
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connectedPorts :+= upstream.out → in
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this
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}
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def connect[T](out: Outlet[T], downstream: DownstreamBoundaryStageLogic[T]): AssemblyBuilder = {
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downstreams :+= out → downstream
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downstreams :+= downstream
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connectedPorts :+= out → downstream.in
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this
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}
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def connect[T](out: Outlet[T], in: Inlet[T]): AssemblyBuilder = {
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connections :+= out → in
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connectedPorts :+= out → in
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this
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}
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def buildAssembly(): GraphAssembly = {
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val ins = upstreams.map(_._2) ++ connections.map(_._2)
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val outs = connections.map(_._1) ++ downstreams.map(_._1)
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val inOwners = ins.map { in ⇒ stages.indexWhere(_.shape.inlets.contains(in)) }
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val outOwners = outs.map { out ⇒ stages.indexWhere(_.shape.outlets.contains(out)) }
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new GraphAssembly(
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stages.toArray,
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Array.fill(stages.size)(Attributes.none),
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(ins ++ Vector.fill(downstreams.size)(null)).toArray,
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(inOwners ++ Vector.fill(downstreams.size)(-1)).toArray,
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(Vector.fill(upstreams.size)(null) ++ outs).toArray,
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(Vector.fill(upstreams.size)(-1) ++ outOwners).toArray)
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}
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def init(): Unit = {
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val assembly = buildAssembly()
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val (logics, inOwners, outOwners) = createLogics(stages.toArray, upstreams.toArray, downstreams.toArray)
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val conns = createConnections(logics, connectedPorts, inOwners, outOwners)
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val (conns, logics) =
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assembly.materialize(Attributes.none, assembly.stages.map(_.module), new java.util.HashMap, _ ⇒ ())
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_interpreter = new GraphInterpreter(assembly, NoMaterializer, logger, logics, conns,
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(_, _, _) ⇒ (), fuzzingMode = false, null)
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for ((upstream, i) ← upstreams.zipWithIndex) {
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_interpreter.attachUpstreamBoundary(conns(i), upstream._1)
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}
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for ((downstream, i) ← downstreams.zipWithIndex) {
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_interpreter.attachDownstreamBoundary(conns(i + upstreams.size + connections.size), downstream._2)
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}
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_interpreter.init(null)
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manualInit(logics.toArray, conns)
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}
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}
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def manualInit(assembly: GraphAssembly): Unit = {
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val (connections, logics) =
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assembly.materialize(Attributes.none, assembly.stages.map(_.module), new java.util.HashMap, _ ⇒ ())
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_interpreter = new GraphInterpreter(assembly, NoMaterializer, logger, logics, connections,
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(_, _, _) ⇒ (), fuzzingMode = false, null)
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def manualInit(logics: Array[GraphStageLogic], connections: Array[Connection]): Unit = {
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_interpreter = new GraphInterpreter(
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NoMaterializer,
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logger,
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logics,
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connections,
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onAsyncInput = (_, _, _) ⇒ (),
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fuzzingMode = false,
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context = null)
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_interpreter.init(null)
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}
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def builder(stages: GraphStageWithMaterializedValue[_ <: Shape, _]*): AssemblyBuilder = new AssemblyBuilder(stages)
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def builder(stages: GraphStageWithMaterializedValue[_ <: Shape, _]*): AssemblyBuilder =
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new AssemblyBuilder(stages.toVector)
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}
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abstract class TestSetup extends Builder {
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@ -132,6 +297,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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setHandler(out, new OutHandler {
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override def onPull(): Unit = lastEvent += RequestOne(UpstreamProbe.this)
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override def onDownstreamFinish(): Unit = lastEvent += Cancel(UpstreamProbe.this)
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override def toString = s"${UpstreamProbe.this.toString}.outHandler"
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})
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def onNext(elem: T, eventLimit: Int = Int.MaxValue): Unit = {
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@ -161,6 +327,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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override def onPush(): Unit = lastEvent += OnNext(DownstreamProbe.this, grab(in))
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override def onUpstreamFinish(): Unit = lastEvent += OnComplete(DownstreamProbe.this)
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override def onUpstreamFailure(ex: Throwable): Unit = lastEvent += OnError(DownstreamProbe.this, ex)
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override def toString = s"${DownstreamProbe.this.toString}.inHandler"
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})
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def requestOne(eventLimit: Int = Int.MaxValue): Unit = {
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@ -185,6 +352,8 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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class EventPropagateStage extends GraphStage[FlowShape[Int, Int]] {
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val in = Inlet[Int]("Propagate.in")
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val out = Outlet[Int]("Propagate.out")
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in.id = 0
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out.id = 0
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override val shape: FlowShape[Int, Int] = FlowShape(in, out)
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override def createLogic(inheritedAttributes: Attributes): GraphStageLogic = new GraphStageLogic(shape) with InHandler with OutHandler {
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@ -196,6 +365,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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setHandlers(in, out, this)
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}
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override def toString = "EventPropagateStage"
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}
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// step() means different depending whether we have a stage between the two probes or not
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@ -236,29 +406,22 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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})
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}
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private val assembly = if (!chasing) {
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new GraphAssembly(
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stages = Array.empty,
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originalAttributes = Array.empty,
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ins = Array(null),
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inOwners = Array(-1),
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outs = Array(null),
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outOwners = Array(-1))
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} else {
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val propagateStage = new EventPropagateStage
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new GraphAssembly(
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stages = Array(propagateStage),
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originalAttributes = Array(Attributes.none),
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ins = Array(propagateStage.in, null),
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inOwners = Array(0, -1),
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outs = Array(null, propagateStage.out),
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outOwners = Array(-1, 0))
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}
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val (logics, connections) =
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if (!chasing) {
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val logics = Array[GraphStageLogic](out, in)
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setLogicIds(logics)
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val connections = GraphInterpreterSpecKit.createLinearFlowConnections(logics)
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(logics, connections)
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} else {
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val propagateStage = new EventPropagateStage
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setPortIds(propagateStage)
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val logics = Array[GraphStageLogic](out, propagateStage.createLogic(Attributes.none), in)
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setLogicIds(logics)
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val connections = GraphInterpreterSpecKit.createLinearFlowConnections(logics)
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(logics, connections)
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}
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manualInit(assembly)
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interpreter.attachDownstreamBoundary(interpreter.connections(if (chasing) 1 else 0), in)
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interpreter.attachUpstreamBoundary(interpreter.connections(0), out)
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interpreter.init(null)
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manualInit(logics, connections)
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}
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abstract class FailingStageSetup(initFailOnNextEvent: Boolean = false) extends TestSetup {
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@ -280,7 +443,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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// Must be lazy because I turned this stage "inside-out" therefore changing initialization order
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// to make tests a bit more readable
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lazy val stage: GraphStageLogic = new GraphStageLogic(stageshape) {
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lazy val insideOutStage: GraphStageLogic = new GraphStageLogic(stageshape) {
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private def mayFail(task: ⇒ Unit): Unit = {
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if (!_failOnNextEvent) task
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else {
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@ -293,24 +456,27 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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override def onPush(): Unit = mayFail(push(stageout, grab(stagein)))
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override def onUpstreamFinish(): Unit = mayFail(completeStage())
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override def onUpstreamFailure(ex: Throwable): Unit = mayFail(failStage(ex))
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override def toString = "insideOutStage.stagein"
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})
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setHandler(stageout, new OutHandler {
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override def onPull(): Unit = mayFail(pull(stagein))
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override def onDownstreamFinish(): Unit = mayFail(completeStage())
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override def toString = "insideOutStage.stageout"
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})
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override def preStart(): Unit = mayFail(lastEvent += PreStart(stage))
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override def preStart(): Unit = mayFail(lastEvent += PreStart(insideOutStage))
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override def postStop(): Unit =
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if (!_failOnPostStop) lastEvent += PostStop(stage)
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if (!_failOnPostStop) lastEvent += PostStop(insideOutStage)
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else throw testException
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override def toString = "stage"
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override def toString = "insideOutStage"
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}
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private val sandwitchStage = new GraphStage[FlowShape[Int, Int]] {
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override def shape = stageshape
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override def createLogic(inheritedAttributes: Attributes): GraphStageLogic = stage
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override def createLogic(inheritedAttributes: Attributes): GraphStageLogic = insideOutStage
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override def toString = "sandwitchStage"
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}
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class UpstreamPortProbe[T] extends UpstreamProbe[T]("upstreamPort") {
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@ -330,8 +496,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
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.init()
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}
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abstract class OneBoundedSetupWithDecider[T](decider: Decider, _ops: GraphStageWithMaterializedValue[Shape, Any]*) extends Builder {
|
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val ops = _ops.toArray
|
||||
abstract class OneBoundedSetupWithDecider[T](decider: Decider, ops: GraphStageWithMaterializedValue[Shape, Any]*) extends Builder {
|
||||
|
||||
val upstream = new UpstreamOneBoundedProbe[T]
|
||||
val downstream = new DownstreamOneBoundedPortProbe[T]
|
||||
|
|
@ -349,35 +514,15 @@ trait GraphInterpreterSpecKit extends StreamSpec {
|
|||
private def run() = interpreter.execute(Int.MaxValue)
|
||||
|
||||
private def initialize(): Unit = {
|
||||
import GraphInterpreter.Boundary
|
||||
|
||||
var i = 0
|
||||
val attributes = Array.fill[Attributes](ops.length)(ActorAttributes.supervisionStrategy(decider))
|
||||
val ins = Array.ofDim[Inlet[_]](ops.length + 1)
|
||||
val inOwners = Array.ofDim[Int](ops.length + 1)
|
||||
val outs = Array.ofDim[Outlet[_]](ops.length + 1)
|
||||
val outOwners = Array.ofDim[Int](ops.length + 1)
|
||||
|
||||
ins(ops.length) = null
|
||||
inOwners(ops.length) = Boundary
|
||||
outs(0) = null
|
||||
outOwners(0) = Boundary
|
||||
|
||||
while (i < ops.length) {
|
||||
val stage = ops(i).asInstanceOf[GraphStageWithMaterializedValue[FlowShape[_, _], _]]
|
||||
ins(i) = stage.shape.in
|
||||
inOwners(i) = i
|
||||
outs(i + 1) = stage.shape.out
|
||||
outOwners(i + 1) = i
|
||||
i += 1
|
||||
}
|
||||
|
||||
manualInit(new GraphAssembly(ops, attributes, ins, inOwners, outs, outOwners))
|
||||
interpreter.attachUpstreamBoundary(0, upstream)
|
||||
interpreter.attachDownstreamBoundary(ops.length, downstream)
|
||||
|
||||
interpreter.init(null)
|
||||
|
||||
val supervision = ActorAttributes.supervisionStrategy(decider)
|
||||
val attributes = Array.fill[Attributes](ops.length)(supervision)
|
||||
val (logics, _, _) = createLogics(
|
||||
ops.toArray,
|
||||
Array(upstream),
|
||||
Array(downstream),
|
||||
attributes)
|
||||
val connections = createLinearFlowConnections(logics)
|
||||
manualInit(logics, connections)
|
||||
}
|
||||
|
||||
initialize()
|
||||
|
|
@ -452,6 +597,7 @@ trait GraphInterpreterSpecKit extends StreamSpec {
|
|||
|
||||
}
|
||||
|
||||
abstract class OneBoundedSetup[T](_ops: GraphStageWithMaterializedValue[Shape, Any]*) extends OneBoundedSetupWithDecider[T](Supervision.stoppingDecider, _ops: _*)
|
||||
abstract class OneBoundedSetup[T](_ops: GraphStageWithMaterializedValue[Shape, Any]*)
|
||||
extends OneBoundedSetupWithDecider[T](Supervision.stoppingDecider, _ops: _*)
|
||||
}
|
||||
*/
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue